Arteris, Inc. is a leading system IP provider dedicated to accelerating the creation of systems on chips (SoCs), and Andes Technology (Taiwan Stock Exchange: 6533) is a founding and principal member of the RISC-V International organization. Also a leading provider of high-performance/low-power RISC-V processor IP, today announced a partnership to advance RISC-V-based processors for artificial intelligence, 5G, networking, mobile, storage, AIoT and space applications. Innovation in SoC design.
The Andes QiLai RISC-V platform is a development board powered by the QiLai SoC, which is based on Andes’ RISC-V processor IP and Arteris FlexNoC interconnect IP for on-chip connectivity. The QiLai SoC integrates Andes 64-bit AX45MP multi-core processor (quad-core cluster) running at 2.2 GHz and NX27V vector processor running at 1.5 GHz, and uses Arteris Network-on-Chip (NoC) interconnect IP, which The IP features PCIe, DDR, SRAM and general IO subsystems using the AMBA AXI protocol. Supported software includes the OpenSUSE Linux distribution, AndeSight™ toolchain, AndeSoft™ software stack, and AndesAIRE™ NN SDK for converting AI/ML models into executable files.
Dr. Charlie Su, President and Chief Technology Officer of Andes Technology, said: “Despite the widespread use of AndesCore™ AX45MP and NX27V processors, we are pleased to see QiLai SoC’s first success on a new project. Arteris NoC IP is a flexible, The best choice for high-performance, top-level connectivity. The QiLai platform enhances rapid development and evaluation of RISC-V software and accelerates the expansion of the RISC-V ecosystem.”
Michal Siwinski, Chief Marketing Officer of Arteris, said: “We are excited to partner with Andes and support the interoperability of the QiLai platform to further accelerate the mainstream adoption of RISC-V technology. Our collaboration supports our goal to be a catalyst for SoC innovation. mission so that our mutual customers can focus on effectively creating the breakthroughs of the future.”
Arteris’ FlexNoC non-coherent NoC IP and Ncore cache-coherent NoC IP enable scalable, low-latency and energy-efficient on-chip communications to achieve superior performance in complex SoC designs. The technology facilitates the integration of high-performance, low-power CPU IP, enhancing system functionality and interoperability, especially within the growing RISC-V ecosystem. This configurable and adaptable interconnect solution connects seamlessly with a variety of components to reduce risk and accelerate time to market. System designers can leverage Arteris NoC IP to enhance the reliability and quality of next-generation SoCs by connecting well-tested CPU IP blocks.
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