After Beyond 10nm process may also improve the device performance

In the “2016 Symposia on VLSI Technology” (June 13 to 17 in Honolulu held), following “Plenary Session” (plenary session), on the Session T2 “Technology Highlighted Session”, also emerged a lot about 10nm process technology papers. 86 papers of this Symposium adopted, there 12 was chosen as the focus of the paper, including four on the Highlighted Session Session T2 publication.

These objects thesis dissertation is the use of Si, SiGe, InGaAs channel different materials FinFET technology, and STT-MRAM. At the meeting, discussions are heating up at the end of the meeting, many listeners will be surrounded by the publisher, the atmosphere is very warm.

In recent years, with the miniaturization of silicon integrated circuits exposed limitations, researchers focus on the development direction after the demise of Moore’s device technologies discussed. Despite this situation, but in this Highlighted Session, on 10nm process technology, the device is still a lot of papers, it showed higher performance-based fine still advancing, still going strong.

Realize four kinds of Vth

First, Samsung Electronics announced the 10nm process Si FinFET technology (lecture No. 2.1), its main feature is to achieve four kinds of Vth by improving the gate stack, improved fin formation, contacts and many other processes.

All parts have achieved miniaturization, compared with 14nm technology, speed increased by 27% at the same speed, power consumption reduced by 40%, and the SRAM cell size to 0.04μm2. Although Korea recently published a paper on the quantity is less than in the past, but this release is still showing strong integration of Samsung technology.

Next, IBM and GLOBALFOUNDRIES released using SiGe as a channel material 10nm node technology (lecture No. 2.2). A big difference between this technology and Samsung is using a SiGe channel pMOS, nMOS using conventional silicon.

On paper shows that by using the pMOS Ge concentration of 20% of SiGe, not only the mobility increased by 35%, effectively increase the current 17%, also significantly improved NBTI (Negative Bias Temperature Instability, negative bias temperature instability). The paper noted that the key is to improve the properties by reducing the oxygen concentration to reduce defects. But also it provides four kinds of Vth, and Samsung’s 10nm platform in stark contrast.

InGaAs transistor find practical road

TSMC third stage, introduced the use of more advanced than SiGe of InGaAs FinFET (lecture No. 2.3). InGaAs channel is formed by epitaxial growth on 300mm silicon wafers. Realized on a silicon wafer with the grown lattice matched InP substrate device the same performance, reaching the largest existing InGaAs transistor on-state current, which is a major technological progress. To put into practice the InGaAs, the key is to grow, process, and all other sectors should be using a silicon platform, the paper pointed out the ways to achieve this goal.

Finally, the US TDK Headway Technologies released a paper (Paper No. 2.4) on the improvement of STT-MRAM writing speed. Without reducing data storage characteristics of the premise, to reduce by the write pulse width to 750ps, the successful use of 8MB array implements 3ns pulse writing. By implementing sub-nanosecond high-speed writing, it opened the way to MRAM LLC cache road.

About the future 10nm process technology, in addition Highlighted Session described above, but in Session T9 “Technology Scaling Beyond 10nm” is also published a number of related papers, including papers focus. For example, TSMC announced the area 0.03μm2, Samsung’s smaller fine than SRAM cell described previously (Paper No. 9.1). IBM released Ge concentration up to 60% of the SiGe-FinFET technology, proved this technology enables effective gate insulating film thickness of 0.7nm, the fin width of 4nm finer (Paper No. 9.3).

In the case of people already realize miniaturization will soon reach the limit, indicating that can improve the performance by fine papers was endless, indicating that after beyond 10nm process, at least for some time, the device performance may also continue to increase. I sincerely look forward to after the technology beyond 10nm, continue to move toward 7nm node.

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